Program

Monday July 9

09:00 – 09:35  Registration
09:40 – 10:00  Welcome and Introduction
10:00 – 11:00  Keynote (see details at the bottom of the page)

Dietmar Fey.
HPX: A high-level approach to standarize asynchronous and massive parallelism in C++

11:00 – 11:30  Coffee break
11:30 – 13:00  Session 1  (3 papers)

Clemens Grelck and Heinrich Wiesinger.
Persistent Asynchronous Adaptive Specialization for Generic Array Programming

Miguel Areias and Ricardo Rocha.
Simpler is Faster: Multi-Dimensional Lock-Free Arrays for Multithreaded Mode-Directed Tabling in Prolog

Filip Arvid Jakobsson.
Automatic Cost Analysis for Imperative BSP programs

13:00 – 14:00  Lunch

14:00 – 15:30  Session 2  (3 papers)

Antonio Vilches, Angeles Navarro, Francisco Corbera, Andrés Rodríguez and Rafael Asenjo.
Heterogeneous parallel for template based on TBB

Ana Moreton-Fernandez and Arturo Gonzalez-Escribano.
Automatic Runtime Calculation of Communications for Data-Parallel Expressions with Periodic Conditions

Anshu S Anand, R. K. Shyamasundar and Sathya Peri.
STMs in Practice: Partial Rollback vs Pure Abort Mechanisms

15:30 – 16:00  Coffee break
16:00 – 17:00  Session 3  (2 papers)

Javier López-Fandiño, Dora B. Heras, Francisco Argüello and Mauro Dalla Mura.
GPU Framework for Change Detection in Multitemporal Hyperspectral Images

Rohit Atre.
Dissecting sequential programs for parallelization — An Approach Based on Computational Units

17:00 – 19:30  Free time (social event, city tour)
19:45 – 22:30  Conference Dinner

Tuesday, July 11

09:30 – 11:00  Session 4  (3 papers)

August Ernstsson and Christoph Kessler.
Extending smart containers for data locality-aware skeleton programming

Fabian Wrede, Breno Menezes and Herbert Kuchen.
Fish School Search with Algorithmic Skeletons

Onofre Coll Ruiz and Kiminori Matsuzaki.
Keeping control away from computation: a computation control layer over the vertex-centric graph processing model

11:00 – 11:30  Coffee break
11:30 – 13:00  Session 5  (3 papers)

Marco Aldinucci, Marco Danelutto, Daniele De Sensi, Gabriele Mencagli and Massimo Torquati.
Towards Power-Aware Data Pipelining on Multicores

Dalvan Griebler, Renato B. H. Filho, Marco Danelutto and Luiz Gustavo Fernandes.
High-Level and Productive Stream Parallelism for Dedup, Ferret, and Bzip2

Ari Rasch and Sergei Gorlatch. ATF:
A Flexible Framework for Auto-Tuning Many-Core Programs

13:00 – 13:30  Presentation of next HLPP events and closing
13:45 – 15:30  Tapas lunch in the city center


Keynote

Dietmar Fey

HPX: A high-level approach to standarize asynchronous and massive parallelism in C++

Abstract

The development of processor and computer architectures in the last 10 to 15 years was mainly driven on technology side by the necessity to get the energy consumption under control. This leaded to an observed movement from single to multi-many core architectures and finally to intensified heterogeneous architectures. On the other side, this heterogeneity hindered the programming of such architectures for HPC, and in increasing way also for embedded applications. Different solutions emerged to control this complexity like library solutions, language extensions, domain-specific languages (DSLs), and experimental programming languages.

In this keynote we discuss another approach to hide heterogeneity and to establish long-term sustainability by a consequent setting on C++. HPX offers a parallel runtime system which extends the C++11/14 standard to facilitate distributed operations, to enable fine-grained constraint based parallelism, and to support runtime adaptive resource management. The keynote gives insight in the setup of HPX and demonstrates its applicability for HPC as well as compute-intensive embedded systems.

Short bio

dietmarFeyProf. Dr.-Ing. Dietmar Fey holds a diploma degree in Computer Science from Friedrich-Alexander-University (FAU) Erlangen-Nürnberg, Germany.  In 1992 he received a Ph.D. from FAU with a work on an investigation about Using Optics in Computer Architectures. From 1994 to 1999 he researched at Friedrich-Schiller-University Jena where he made his habilitation. From 1999 to 2001 he worked as lecturer at University Siegen before he became a Professor for Computer Engineering at University Jena. Since 2009 he leads the Chair for Computer Architectureat Friedrich-Alexander-University Erlangen-Nürnberg (FAU). His research interests are in parallel computer architectures, parallel programming environments, parallel embedded systems, and memristive computing.

10th International Symposium on High-Level Parallel Programming and Applications